As integrated circuits (ICs) have become more complex, more pins are employed in a limited area, and more I/O signal pins are switching at high speed at the same time. Thus, decoupling the power supplies through efficient usage of low inductance capacitors has become increasingly essential. In wire-bonded IC packages, it becomes difficult to locate the capacitors. In a wire-bonded package, an IC die is attached to a carrier and die pads on the IC die are electrically connected to bond pads on the carrier using wires (“wire-bonds”). In some wire-bonded packages, capacitors are located on the carrier. However, the distance between the die and such capacitors may result in high loop inductance (much higher than capacitors on the carrier in a flip-chip package, for example). High loop inductance deleteriously affects the de-coupling function of the capacitors. Another solution is to form the capacitors on the IC die itself. However, the formation of capacitors on the IC die can be impossible or impractical, can use often scarce real estate on the IC die, can increase the size of the IC die, and can increase the cost of the IC die.
Accordingly, there exists a need in the art for a semiconductor device package with capacitors that overcomes the aforementioned disadvantages.